CS6303 COMPUTER ARCHITECTURE UNIT III PROCESSOR AND CONTROL UNIT

PART-A 
1. What is meant by data path element?
2. What is the use of PC register?
3. What is meant by register file?
4. What are the two state elements needed to store and access an instruction?
5. Draw the diagram of portion of datapath used for fetching instruction.
6. Define – Sign Extend and Vector interupts
7. What is meant by branch target address?
8. Differentiate branch taken from branch not taken.
9. What is meant by delayed branch?
10. Write the instruction format for the jump instruction.
11. What are hazards? Write its types.
12. What is meant by forwarding?
13. What is pipeline stall?
14. What is meant by branch prediction?
15. What are the 5 pipeline stages?
16. What are exceptions and interrupts?
17. What is meant by pipelining?
18. What are the five steps in MIPS instruction execution?
19. What are the three instruction classes and their instruction formats?
20. Write the formula for calculating time between instructions in a pipelined processor.


PART B 
1. Explain the basic MIPS implementation of instruction set
2. Explain the basic MIPS implementation with necessary multiplexers and control lines
3. What is control hazards ?Explain the methods for dealing with the control hazards.
4. Discuss the influence of pipelining in detail

5. Explain how the instruction pipeline works. What are the various situations where an instruction pipeline can stall? What can be its resolution? 

6. What is data hazard? How do you overcome it?What are its side effects? 

7. Discuss the data and control path methods in pipelining 

8. Explain dynamic branch prediction 

9. How exceptions are handled in MIPS 

10. Explain in detail about building a datapath 

11. Explain in detail about control implementation scheme